CIRIANI, VALENTINA
CIRIANI, VALENTINA
Dipartimento di Informatica Giovanni Degli Antoni
Autosymmetric and D-reducible Functions: Theory and Application to Security
2023 A. Bernasconi, V. Ciriani, L. Monfrini
Quaternary Reversible Circuit Optimization for Scalable Multiplexer and Demultiplexer
2023 A. TAHERI MONFARED, V. Ciriani, T. Mikkonen, M. Haghparast
Compact Quantum Circuits for Dimension Reducible Functions
2023 A. Bernasconi, V. Ciriani, A. Taheri Monfared, S. Zanoni
Novel qutrit circuit design for multiplexer, De-multiplexer, and decoder
2023 A. Taheri Monfared, V. Ciriani, L. Kettunen, M. Haghparast
Multiplicative Complexity of XOR Based Regular Functions
2022 A. Bernasconi, S. Cimato, V. Ciriani, M.C. Molteni
On the Optimal OBDD Representation of 2-XOR Boolean Affine Spaces
2022 A. Bernasconi, V. Ciriani, M. Longhi
XOR-AND-XOR Logic Forms for Autosymmetric Functions and Applications to Quantum Computing
2022 A. Bernasconi, A. Berti, V. Ciriani, G. Del Corso, I. Fulginiti
Exploiting Symmetrization and D-reducibility for Approximate Logic Synthesis
2022 A. Bernasconi, V. Ciriani, T. Villa
ADD-based Spectral Analysis of Probing Security
2022 M.C. Molteni, V. Zaccaria, V. Ciriani
Circuit Design Steps for Nano-Crossbar Arrays: Area-Delay-Power Optimization with Fault Tolerance
2021 M.C. Morgul, L. Frontini, O. Tunali, L. Anghel, V. Ciriani, E.I. Vatajelu, C.A. Moritz, M.R. Stan, D. Alexandrescu, M. Altun
A Boolean Heuristic for Disjoint SOP Synthesis
2021 P. Balasubramanian, A. Bernasconi, V. Ciriani, T. Villa
Autosymmetry of Incompletely Specified Functions
2021 A. Bernasconi, V. Ciriani
Stuck-At Fault Mitigation of Emerging Technologies Based Switching Lattices
2020 L. Anghel, A. Bernasconi, V. Ciriani, L. Frontini, G. Trucco, I. Vatajelu
Multiplicative Complexity of Autosymmetric Functions: Theory and Applications to Security
2020 A. Bernasconi, S. Cimato, V. Ciriani, M.C. Molteni
Computing the full quotient in bi-decomposition by approximation
2020 A. Bernasconi, V. Ciriani, J. Cortadella, T. Villa
Testability of Switching Lattices in the Stuck at Fault Model
2019 A. Bernasconi, V. Ciriani, L. Frontini
An OBDD-Based Technique for the Efficient Synthesis of Garbled Circuits
2019 S. Cimato, V. Ciriani, E. Damiani, M. Ehsanpour
Fault Mitigation of Switching Lattices under the Stuck-At-Fault Model
2019 L. Anghel, A. Bernasconi, V. Ciriani, L. Frontini, G. Trucco, I. Vatajelu
Testability of Switching Lattices in the Cellular Fault Model
2019 A. Bernasconi, V. Ciriani, L. Frontini
Approximate Logic Synthesis by Symmetrization
2019 A. Bernasconi, V. Ciriani, T. Villa