Recently defined, three-level logic sum of pseudo-products (SPP) forms are EXOR-AND-OR networks representing Boolean functions, and are much shorter than standard two-level sum of products (SOP) expressions (Luccio and Pagli, 1999). The main disadvantages of SPP networks are their cumbersome theory in the original formulation and their high minimization time. In addition, the current technology cannot efficiently implement the unbounded fanin EXOR gates of SPP expressions. In this paper, we rephrase SPP theory in an algebraic context to obtain an easier description of the networks. We define a new model of SPP networks (k-SPP) with bounded fanin EXOR gates, whose minimization time is strongly reduced and whose minimal forms are still very compact. In the Boolean space {0, 1}n, a k-SPP form contains EXOR gates with at most k literals, where 1 ≤ k ≤ n. The limit case k = n corresponds to SPP networks and k = 1 to SOPs. Finally, we perform an extensive set of experiments on classical benchmarks. In order to validate our approach, the results are compared with those obtained for the major two- and three-level forms using standard metrics.

Synthesis of SPP three-level logic networks using affine spaces / V. Ciriani. - In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. - ISSN 0278-0070. - 22:10(2003), pp. 1310-1323.

Synthesis of SPP three-level logic networks using affine spaces

V. Ciriani
Primo
2003

Abstract

Recently defined, three-level logic sum of pseudo-products (SPP) forms are EXOR-AND-OR networks representing Boolean functions, and are much shorter than standard two-level sum of products (SOP) expressions (Luccio and Pagli, 1999). The main disadvantages of SPP networks are their cumbersome theory in the original formulation and their high minimization time. In addition, the current technology cannot efficiently implement the unbounded fanin EXOR gates of SPP expressions. In this paper, we rephrase SPP theory in an algebraic context to obtain an easier description of the networks. We define a new model of SPP networks (k-SPP) with bounded fanin EXOR gates, whose minimization time is strongly reduced and whose minimal forms are still very compact. In the Boolean space {0, 1}n, a k-SPP form contains EXOR gates with at most k literals, where 1 ≤ k ≤ n. The limit case k = n corresponds to SPP networks and k = 1 to SOPs. Finally, we perform an extensive set of experiments on classical benchmarks. In order to validate our approach, the results are compared with those obtained for the major two- and three-level forms using standard metrics.
Circuit optimization; Circuit synthesis; Logic design
2003
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/2434/64026
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