This paper discusses the use of evolutionary algorithms to design digital circuits. It is shown that evolutionary design can be fully compliant with the existing design methodologies. Moreover, the evolutionary design is capable to perform a better exploration of the design space, and therefore it can find solutions having different features with respect to conventional design. In some cases, evolved circuits can have better performances, or they can be optimized with respect to different parameters. An example on design of a multi-rate digital filter with reduced power consumption is presented and discussed. FPGA implementation demonstrates that evolutionary design can lead to both area and power saving with respect to conventional design.

Evolutionary design and FPGA implementation of digital filters / A. Azzini, M. Bettoni, V. Liberali, R. Rossi, A.G.B. Tettamanzi - In: VLSI circuits and systems : 19-21 may 2003, Maspalomas, Grand Canaria, Spain / [a cura di] J.F. Lopez, J.A. Montiel-Nelson, D. Pavlidis. - Bellingham : SPIE, 2003. - ISBN 0819449776. - pp. 485-496 (( convegno VLSI Circuits and Systems tenutosi a Maspalomas, Spain nel 2003.

Evolutionary design and FPGA implementation of digital filters

A. Azzini;V. Liberali;A.G.B. Tettamanzi
2003

Abstract

This paper discusses the use of evolutionary algorithms to design digital circuits. It is shown that evolutionary design can be fully compliant with the existing design methodologies. Moreover, the evolutionary design is capable to perform a better exploration of the design space, and therefore it can find solutions having different features with respect to conventional design. In some cases, evolved circuits can have better performances, or they can be optimized with respect to different parameters. An example on design of a multi-rate digital filter with reduced power consumption is presented and discussed. FPGA implementation demonstrates that evolutionary design can lead to both area and power saving with respect to conventional design.
Digital filters; Evolutionary design; FPGA; Low-power design; VLSI CAD tools
Settore ING-INF/01 - Elettronica
Settore INF/01 - Informatica
2003
SPIE
Book Part (author)
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/2434/72221
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