Design of a charge sensitive amplifier for silicon particle detector in BCD 180 nm process

This paper presents the design of a charge sensitive amplifier (CSA) for an analog processing circuit of 47×6 silicon pixel detector array. The design has been implemented in BCD 180 nm technology. A diode with an area of 250 × 50 µm2 is used to realize a unit sensor pixel. A 100 % fill factor is achieved by confining the analog circuit in the diode. Low power and area efficient single ended folded cascode amplifier is employed as a basic building block of the CSA. Further, an on-chip corner control circuit is proposed to make the design insensitive to process variations and to reduce power dissipation in the CSA.