This paper proposes the startup circuit for a low voltage CMOS bandgap reference circuit. The all MOS scalable voltage bandgap reference (BGR) circuit has been designed and simulated using a standard 65 nm CMOS technology. The proposed startup circuit is simple, smaller in size and uses the feedback mechanism. The BGR circuit provides 661.54 mV of the voltage reference and 9 μA of the current reference with the temperature sensitivity of 4.23 ppm/°C. The total power consumption of the BGR and the startup circuitries are 243 μW and 148 nW respectively.

The start-up circuit for a low voltage bandgap reference / H. Shrimali, V. Liberali - In: Electronics, Circuits and Systems (ICECS), 2014 21st IEEE International Conference on[s.l] : IEEE, 2014 Dec. - ISBN 9781479942428. - pp. 92-95 (( Intervento presentato al 21. convegno International Conference on Electronics, Circuits and Systems tenutosi a Marseille nel 2014 [10.1109/ICECS.2014.7049929].

The start-up circuit for a low voltage bandgap reference

V. Liberali
2014

Abstract

This paper proposes the startup circuit for a low voltage CMOS bandgap reference circuit. The all MOS scalable voltage bandgap reference (BGR) circuit has been designed and simulated using a standard 65 nm CMOS technology. The proposed startup circuit is simple, smaller in size and uses the feedback mechanism. The BGR circuit provides 661.54 mV of the voltage reference and 9 μA of the current reference with the temperature sensitivity of 4.23 ppm/°C. The total power consumption of the BGR and the startup circuitries are 243 μW and 148 nW respectively.
Hardware and Architecture; Electrical and Electronic Engineering
Settore ING-INF/01 - Elettronica
dic-2014
Ansys
Invia
National Instruments
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/2434/514596
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