Temporal and spatial locality of the inputs, i.e., the property allowing a classifier to receive the same samples over time - or samples belonging to a neighborhood - with high probability, can be translated into the design of embedded classifiers. The outcome is a computational complexity and power aware design particularly suitable for implementation. A classifier based on the gated-parallel family has been found particularly suitable for exploiting locality properties: Subclassifiers are generally small, independent each other, and controlled by a master-enabling module granting that only a subclassifier is active at a time, the others being switched off. By exploiting locality properties we obtain classifiers with accuracy comparable with the ones designed without integrating locality but gaining a significant reduction in computational complexity and power consumption.
|Titolo:||Exploiting application locality to design low-complexity, highly performing, and power-aware embedded classifiers|
|Autori interni:||SCOTTI, FABIO (Ultimo)|
|Parole Chiave:||Applicational-level design ; Classifier design ; Embedded systems ; Gated-parallel classifiers ; Power-aware design.|
|Settore Scientifico Disciplinare:||Settore INF/01 - Informatica|
|Data di pubblicazione:||mag-2006|
|Digital Object Identifier (DOI):||10.1109/TNN.2006.872345|
|Appare nelle tipologie:||01 - Articolo su periodico|