Interfacing low-noise charge-sensitive preamplifiers to high-resolution flash ADCs

A low-noise, low-power, high bandwidth circuit architecture is presented, suitable for interfacing highly segmented semiconductor detectors to high-speed high-resolution flash ADCs. The proposed circuit works as an optimized interface between the preamplifiers and the ADCs, and has many useful features, including: end termination for both differential-mode and common-mode components of the input signals, single-ended or differential-input mode, AC or DC coupling to the ADC, introduction of a preset common-mode voltage for differential ADC matching, introduction and remotely-controlled adjustment of differential DC offset for dynamic range maximization, remotely controlled range selection, test-pattern waveform multiplexed to the ADC for precise inter-channel time synchronization. The interface has been conceived for new-generation, highly-segmented, position-sensitive HPGe detectors for nuclear physics experiments, requiring digitization at 100 Ms/s 14bit or better, and is adequate for high-resolution gamma-spectroscopy and gamma-ray tracking.