This paper presents an approach for the analysis and the experimental evaluation of crosstalk effects due to current pulses drawn from voltage supplies in mixed analog-digital CMOS integrated circuits. A realistic model of bonding and package parasitics has been derived to study digital switching noise injected through bonding interconnections. Simulations results indicate that disturbances due to switching currents in digital blocks propagate through the substrate and affect analog voltages, thus degrading circuit performance. Test structures have been integrated into a test chip mounted with different technologies, in order to compare the measurements on test chips. Measurements confirm simulation results. Chip-on-board mounting technology has better performance with respect to chip-in-package, due to the reduction of parasitic elements.
Impact of package parasitics on crosstalk in mixed-signal ICs / Giorgio Boselli, Vincenzo Ferragina, Nicola Ghittori, Valentino Liberali, Guido Torelli, Gabriella Trucco - In: VLSI Circuits and Systems II / Jose F. Lopez, Francisco V. Fernandez, Jose Maria Lopez-Villegas, Jose M. de la Rosa. - Bellingham, WA, USA : SPIE press, 2005 Jun. - ISBN 0819458325. - pp. 213-222 (( Intervento presentato al 2. convegno VLSI Circuits and Systems tenutosi a Seville, Spain nel 2005.
Impact of package parasitics on crosstalk in mixed-signal ICs
Giorgio Boselli;Valentino Liberali;Gabriella Trucco
2005
Abstract
This paper presents an approach for the analysis and the experimental evaluation of crosstalk effects due to current pulses drawn from voltage supplies in mixed analog-digital CMOS integrated circuits. A realistic model of bonding and package parasitics has been derived to study digital switching noise injected through bonding interconnections. Simulations results indicate that disturbances due to switching currents in digital blocks propagate through the substrate and affect analog voltages, thus degrading circuit performance. Test structures have been integrated into a test chip mounted with different technologies, in order to compare the measurements on test chips. Measurements confirm simulation results. Chip-on-board mounting technology has better performance with respect to chip-in-package, due to the reduction of parasitic elements.| File | Dimensione | Formato | |
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