In the current design of the high luminosity SuperB asymmetric e+-e- collider, the center of mass boost is reduced with respect to BaBar and to efficiently perform the time-dependent measurements an improved vertex resolution is required. A vertex tracker based on the layout of the BaBar Silicon Vertex Tracker (SVT) with an additional innermost layer (Layer0) is a design that achieves such a tracking resolution, provided that the extra layer is placed at radius of 1.5 cm from the interaction point, its thickness is less than 1% X_0 and it is able to withstand a background rate of several MHz/cm^2. The different options for the Layer0 are reviewed, starting from the most technologically mature solution, a high resistivity short strip detector, describing then a small-pitch hybrid pixel detector and finally presenting the most challenging proposal, based on CMOS MAPS.
The SuperB silicon vertex tracker / S. Bettarini, C. Avanzini, G. Batignani, F. Bosi, M. Ceccanti, R. Cenci, A. Cervelli, F. Crescioli, M. Dell’Orso, F. Forti, P. Giannetti, M.A. Giorgi, S. Gregucci, P. Mammini, G. Marchiori, M. Massa, F. Morsani, N. Neri, E. Paoloni, M. Piendibene, A. Profeti, G. Rizzo, L. Sartori, J. Walsh, E. Yurtsev, A. Lusiani, M. Manghisoni, V. Re, G. Traversi, M. Bruschi, R. Di Sipio, B. Giacobbe, A. Gabrielli, F. Giorgi, G. Pellegrini, C. Sbarra, N. Semprini, R. Spighi, S. Valentinetti, M. Villa, A. Zoccoli, M. Citterio, V. Liberali, F. Palombo, C. Andreoli, L. Gaioni, E. Pozzati, L. Ratti, V. Speziali, D. Gamba, G. Giraudo, P. Mereu, G.F. Dalla Betta, G. Soncini, G. Fontana, M. Bomben, L. Bosisio, P. Cristaudo, G. Giacomini, D. Jugovaz, L. Lanceri, I. Rashevskaya, L. Vitale, G. Venier. - In: POS PROCEEDINGS OF SCIENCE. - ISSN 1824-8039. - (2009 Sep), pp. RD09.038.1-RD09.038.9. ((Intervento presentato al 9. convegno International conference on large scale applications and radiation hardness of semiconductor detectors tenutosi a Florence, Italy nel 2009.
The SuperB silicon vertex tracker
N. Neri;V. Liberali;F. Palombo;
2009
Abstract
In the current design of the high luminosity SuperB asymmetric e+-e- collider, the center of mass boost is reduced with respect to BaBar and to efficiently perform the time-dependent measurements an improved vertex resolution is required. A vertex tracker based on the layout of the BaBar Silicon Vertex Tracker (SVT) with an additional innermost layer (Layer0) is a design that achieves such a tracking resolution, provided that the extra layer is placed at radius of 1.5 cm from the interaction point, its thickness is less than 1% X_0 and it is able to withstand a background rate of several MHz/cm^2. The different options for the Layer0 are reviewed, starting from the most technologically mature solution, a high resistivity short strip detector, describing then a small-pitch hybrid pixel detector and finally presenting the most challenging proposal, based on CMOS MAPS.
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