Nome |
# |
Model and verification of triple-well shielding on substrate noise in mixed-signal CMOS ICs, file dfa8b98f-2502-748b-e053-3a05fe0a3a96
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887
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Impact of package parasitics on crosstalk in mixed-signal ICs, file dfa8b98e-964e-748b-e053-3a05fe0a3a96
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449
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CMOS IC radiation hardening by design, file dfa8b99f-188b-748b-e053-3a05fe0a3a96
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342
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A Digitally-Controlled Ring Oscillator in 28 nm CMOS technology, file dfa8b9a7-c675-748b-e053-3a05fe0a3a96
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313
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Effects of package parasitics on substrate and interconnection crosstalk in mixed-signal CMOS ICs, file dfa8b98e-8ee9-748b-e053-3a05fe0a3a96
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274
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Recent developments on CMOS MAPS for the superB silicon vertex tracker, file dfa8b99c-d2de-748b-e053-3a05fe0a3a96
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183
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An innovative radiation hardened CAM architecture, file dfa8b99f-1dd2-748b-e053-3a05fe0a3a96
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179
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Characterization of an Associative Memory Chip in 28 nm CMOS Technology, file dfa8b9a7-c679-748b-e053-3a05fe0a3a96
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178
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The ATLAS fast TracKer system, file dfa8b9a7-d791-748b-e053-3a05fe0a3a96
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177
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Beam test results for the superB-SVT thin striplet detector, file dfa8b99c-d43b-748b-e053-3a05fe0a3a96
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163
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Enhancing logic synthesis of switching lattices by generalized Shannon decomposition methods, file dfa8b99a-92b2-748b-e053-3a05fe0a3a96
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155
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Low-power, subthreshold reference circuits for the space environment: Evaluated with γ-rays, X-rays, protons and heavy ions, file dfa8b99f-7474-748b-e053-3a05fe0a3a96
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146
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A fast hardware tracker for the ATLAS trigger system, file dfa8b99c-cf0b-748b-e053-3a05fe0a3a96
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137
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Design of a hardware track finder (Fast Tracker) for the ATLAS trigger, file dfa8b999-386a-748b-e053-3a05fe0a3a96
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132
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R&D progress on the SuperB silicon vertex tracker, file dfa8b991-c1b3-748b-e053-3a05fe0a3a96
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127
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Characterization of HV-CMOS detectors in BCD8 technology and of a controlled hybridization technique, file dfa8b99c-bf75-748b-e053-3a05fe0a3a96
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126
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RD53 Collaboration and CHIPIX65 Project for the development of an innovative Pixel Front End Chip for HL-LHC, file dfa8b99c-c116-748b-e053-3a05fe0a3a96
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125
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Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC, file dfa8b999-5f02-748b-e053-3a05fe0a3a96
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124
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Design of analog front-ends for the RD53 demonstrator chip, file dfa8b99c-bf76-748b-e053-3a05fe0a3a96
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122
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Next generation associative memory devices for the FTK tracking processor of the ATLAS experiment, file dfa8b99c-874b-748b-e053-3a05fe0a3a96
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109
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FTK : a Fast track trigger for ATLAS, file dfa8b99c-d2ea-748b-e053-3a05fe0a3a96
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109
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The Serial Link Processor for the Fast TracKer (FTK) processor at ATLAS, file dfa8b99f-8093-748b-e053-3a05fe0a3a96
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106
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RD53A: a large scale prototype for HL-LHC silicon pixel detector phase 2 upgrades, file dfa8b99f-1de2-748b-e053-3a05fe0a3a96
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95
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The SuperB silicon vertex tracker, file dfa8b99f-1a38-748b-e053-3a05fe0a3a96
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92
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Performance of the AMBFTK board for the FastTracker processor for the ATLAS detector upgrade, file dfa8b99f-1a37-748b-e053-3a05fe0a3a96
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85
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ATLAS FTK : Fast Track Trigger, file dfa8b99f-7065-748b-e053-3a05fe0a3a96
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83
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The ASTAROTH Project: enhanced low-energy sensitivity to Dark Matter annual modulation, file dfa8b9a9-a42a-748b-e053-3a05fe0a3a96
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57
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Enhancement of the ATLAS trigger system with a hardware tracker finder FTK, file dfa8b99c-8292-748b-e053-3a05fe0a3a96
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42
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Characterization and tests of different Mach-Zehnder silicon photonic modulator configurations, file dfa8b9a8-b150-748b-e053-3a05fe0a3a96
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37
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65 nm Technology for HEP: Status and Perspective, file dfa8b99c-e536-748b-e053-3a05fe0a3a96
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26
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The associative memory serial link processor for the fast TracKer (FTK) at ATLAS, file dfa8b999-3eba-748b-e053-3a05fe0a3a96
|
8
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Characterization and volume test of the AM06 chip, file dfa8b997-1fde-748b-e053-3a05fe0a3a96
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7
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Enhancing logic synthesis of switching lattices by generalized Shannon decomposition methods, file dfa8b99b-48f6-748b-e053-3a05fe0a3a96
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6
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The first ASIC prototype of a 28 nm time-space front-end electronics for real-time tracking, file 3cec13d4-b216-42f7-b453-65bac05670df
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5
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Charge sharing of single photons in finely segmented pixel detectors, file dfa8b99c-a0c6-748b-e053-3a05fe0a3a96
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5
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Synthesis of P-circuits for logic restructuring, file dfa8b993-cf18-748b-e053-3a05fe0a3a96
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4
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A XOR-based associative memory block in 28 nm CMOS for interdisciplinary applications, file dfa8b997-1aae-748b-e053-3a05fe0a3a96
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3
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HV-CMOS detectors in BCD8 technology, file dfa8b999-18a8-748b-e053-3a05fe0a3a96
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3
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The ATLAS Data acquisition and high level trigger system, file dfa8b99f-1cd1-748b-e053-3a05fe0a3a96
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3
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Double-redundant design methodology to improve radiation hardness in pixel detector readout ICs, file dfa8b99f-6692-748b-e053-3a05fe0a3a96
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3
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Quantum Information with Integrated Photonics, file 74418b8c-2772-452d-a32a-4e92279b06d1
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2
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Radiation-tolerant standard cell synthesis using double-rail redundant approach, file dfa8b996-6d4c-748b-e053-3a05fe0a3a96
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2
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Improvement of radiation tolerance in CMOS ICs through layout-oriented simulation, file dfa8b997-08a8-748b-e053-3a05fe0a3a96
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2
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Logic Synthesis for Switching Lattices by Decomposition with P-Circuits, file dfa8b997-6169-748b-e053-3a05fe0a3a96
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2
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Population count circuits for Associative Memories: A comparison study, file dfa8b999-0181-748b-e053-3a05fe0a3a96
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2
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Heterogeneous computing system platform for high-performance pattern recognition applications, file dfa8b999-1230-748b-e053-3a05fe0a3a96
|
2
|
CHIPIX65: Developments on a new generation pixel readout ASIC in CMOS 65 nm for HEP experiments, file dfa8b999-140e-748b-e053-3a05fe0a3a96
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2
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Design of LVDS driver and receiver in 28 nm CMOS technology for Associative Memories, file dfa8b999-46e8-748b-e053-3a05fe0a3a96
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2
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Power Distribution Network optimization for Associative Memories, file dfa8b999-47e3-748b-e053-3a05fe0a3a96
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2
|
The ATLAS fast tracker processor design, file dfa8b999-48cf-748b-e053-3a05fe0a3a96
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2
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A low-power and high-density Associative Memory in 28 nm CMOS technology, file dfa8b999-521d-748b-e053-3a05fe0a3a96
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2
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HV-CMOS detectors for high energy physics: Characterization of BCD8 technology and controlled hybridization technique, file dfa8b99a-f0a3-748b-e053-3a05fe0a3a96
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2
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A new XOR-based Content Addressable Memory architecture, file dfa8b99c-8ab9-748b-e053-3a05fe0a3a96
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2
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The FastTracker real time processor and its impact on muon isolation, tau and b-jet online selections at ATLAS, file dfa8b99c-90c6-748b-e053-3a05fe0a3a96
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2
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AM06: The Associative Memory chip for the Fast TracKer in the upgraded ATLAS detector, file dfa8b99c-953a-748b-e053-3a05fe0a3a96
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2
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The Fast Track real time processor and its impact on muon isolation, tau and b-jet online selections at ATLAS, file dfa8b99c-b1a8-748b-e053-3a05fe0a3a96
|
2
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Thin pixel development for the SuperB silicon vertex tracker, file dfa8b99c-cc61-748b-e053-3a05fe0a3a96
|
2
|
Logic Synthesis for Switching Lattices by Decomposition with P-Circuits, file dfa8b99e-6a22-748b-e053-3a05fe0a3a96
|
2
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Design of rad-hard SRAM cells : a comparative study, file dfa8b99f-1879-748b-e053-3a05fe0a3a96
|
2
|
Test results and prospects for RD53A, a large scale 65 nm CMOS chip for pixel readout at the HL-LHC, file dfa8b99f-3a04-748b-e053-3a05fe0a3a96
|
2
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A new variable-resolution associative memory for high energy physics, file dfa8b99f-4c08-748b-e053-3a05fe0a3a96
|
2
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Design implementation and test results of the RD53A, a 65 nm large scale chip for next generation pixel detectors at the HL-LHC, file dfa8b9a1-4e8e-748b-e053-3a05fe0a3a96
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2
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Design of Non-Metastable SRAM Cells in 28 nm CMOS Technology, file dfa8b9a1-4e8f-748b-e053-3a05fe0a3a96
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2
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Modelling and Verification of MOS Transistors at Cryogenic Temperature, file 1711e6c4-0e17-486b-8661-99c99ea44eef
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1
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Solid-State Color Centers for Single-Photon Generation, file 8e44b039-181f-480c-8e8f-10c152d87364
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1
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Single Event Transients and Pulse Quenching Effects in Bandgap Reference Topologies for Space Applications, file dfa8b999-06f6-748b-e053-3a05fe0a3a96
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1
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Latest results of the R&D on CMOS MAPS for the layer0 of the SuperB SVT, file dfa8b99c-8294-748b-e053-3a05fe0a3a96
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1
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The front-end chip of the SuperB SVT detector, file dfa8b99c-8747-748b-e053-3a05fe0a3a96
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1
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Design and Characterization of New Content Addressable Memory Cells, file dfa8b99c-896d-748b-e053-3a05fe0a3a96
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1
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A multi-megarad, radiation hardened by design 512 kbit SRAM in CMOS technology, file dfa8b99c-97b7-748b-e053-3a05fe0a3a96
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1
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A radiation hardened 512 kbit SRAM in 180 nm CMOS technology, file dfa8b99c-97bb-748b-e053-3a05fe0a3a96
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1
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A radiation hardened static RAM for high-energy physics experiments, file dfa8b99c-ad70-748b-e053-3a05fe0a3a96
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1
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Characterization of an LVDS Link in 28 nm CMOS for Multi-Purpose Pattern Recognition, file dfa8b99c-ad77-748b-e053-3a05fe0a3a96
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1
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Thin pixel development for the layer0 of the superB silicon vertex tracker, file dfa8b99c-b0ef-748b-e053-3a05fe0a3a96
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1
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A very compact population count circuit for associative memories, file dfa8b99c-b8f5-748b-e053-3a05fe0a3a96
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1
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Associative memory design for the fast track processor (FTK) at ATLAS, file dfa8b99c-bf64-748b-e053-3a05fe0a3a96
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1
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2D and 3D thin pixel technologies for the Layer0 of the SuperB Silicon Vertex Tracker, file dfa8b99c-cab2-748b-e053-3a05fe0a3a96
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1
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Advances in the development of pixel detector for the superB silicon vertex tracker, file dfa8b99c-d427-748b-e053-3a05fe0a3a96
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1
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Layout-oriented simulation of on-destructive single event effects in CMOS IC blocks, file dfa8b99c-e426-748b-e053-3a05fe0a3a96
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1
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Characterisation of an associative memory chip for high-energy physics experiments, file dfa8b99c-e52f-748b-e053-3a05fe0a3a96
|
1
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Next generation associative memory devices for the FTK tracking processor of the ATLAS experiment, file dfa8b99c-e533-748b-e053-3a05fe0a3a96
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1
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Design of a rad-hard library of digital cells for space applications, file dfa8b99f-4c0d-748b-e053-3a05fe0a3a96
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1
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A radiation hardened by design charge pump for flash memories, file dfa8b99f-6697-748b-e053-3a05fe0a3a96
|
1
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Characterization of an Associative Memory Chip in 28 nm CMOS Technology, file dfa8b9a8-16ba-748b-e053-3a05fe0a3a96
|
1
|
Totale |
5.294 |