This paper presents an approach for the simulation of mixed-signal CMOS integrated circuits, aiming at estimating crosstalk effects, by identifying possible sources of disturbances in analog-digital integrated systems, such as current pulses drawn from voltage supplies. A simple expression of voltage and current in the pull-up and the pull-down of a CMOS logic gate can be derived. A computer program demonstrates the feasibility of the proposed approach, and a representation of digital switching noise in time domain has been derived. This representation has been used to perform an analog simulation using SPECTRE, to evaluate the propagation of the switching noise through the parasitic elements of the package and of the bonding wires.

Simulation of crosstalk through bonding and package in mixed-signal CMOS ICs / G. Trucco, G. Boselli, V. Liberali - In: MWSCAS 2004 : the 2004 47. Midwest symposium on circuits and systems : conference proceedings : Hiroshima, Japan, july 25-28, 2004. 1. / [a cura di] [s.n.]. - Piscataway : Institute of electrical and electronics engineers, 2004. - ISBN 078038346X. - pp. I-122-I-124 (( Intervento presentato al 47. convegno Midwest Symposium on Circuits and Systems tenutosi a Hiroshima nel 2004.

Simulation of crosstalk through bonding and package in mixed-signal CMOS ICs

G. Trucco
Primo
;
G. Boselli
Secondo
;
V. Liberali
Ultimo
2004

Abstract

This paper presents an approach for the simulation of mixed-signal CMOS integrated circuits, aiming at estimating crosstalk effects, by identifying possible sources of disturbances in analog-digital integrated systems, such as current pulses drawn from voltage supplies. A simple expression of voltage and current in the pull-up and the pull-down of a CMOS logic gate can be derived. A computer program demonstrates the feasibility of the proposed approach, and a representation of digital switching noise in time domain has been derived. This representation has been used to perform an analog simulation using SPECTRE, to evaluate the propagation of the switching noise through the parasitic elements of the package and of the bonding wires.
CMOS logic circuits ; Bonding processes ; Circuit simulation ; Crosstalk ; Integrated circuit modelling ; Integrated circuit noise ; Integrated circuit packaging ; Logic gates ; Mixed analogue-digital integrated circuits ; Time-domain analysis ; Wires (electric).
Settore ING-INF/01 - Elettronica
2004
Book Part (author)
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/2434/63897
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