Sfoglia per Autore
Efficient optimal greedy algorithms for room allocation
2001 V. Ciriani, N. Pisanti, A. Bernasconi
Logic minimization using exclusive OR gates
2001 V. Ciriani
Fast three-level logic minimization based on autosymmetry
2002 A. Bernasconi, V. Ciriani, F. Luccio, L. Pagli
2-SPP : a practical trade-off between SP and SPP synthesis
2002 V. Ciriani, A. Bernasconi
Static optimality theorem for external memory string access
2002 V. Ciriani, P. Ferragina, F. Luccio, S. Muthukrishnan
Testability of SPP three-level logic networks
2003 V. Ciriani, A. Bernasconi, R. Drechsler
Three-level logic synthesis : algebraic approach and minimization algorithms
2003 V. Ciriani
Three-level logic minimization based on function regularities
2003 A. Bernasconi, V. Ciriani, F. Luccio, L. Pagli
Synthesis of SPP three-level logic networks using affine spaces
2003 V. Ciriani
Synthesis of integer multipliers in sum of pseudoproducts form
2003 V. Ciriani, F. Luccio, L. Pagli
Locally free substitutions are not so free : an open problem in sequence alignment
2004 F. Luccio, S. Brunetti, V. Ciriani, E. Lodi, N. Pisanti
Room allocation : a polynomial subcase of the quadratic assignment problem
2004 V. Ciriani, N. Pisanti, A. Bernasconi
Stuck-at-fault testability of SPP three-level logic forms
2006 V. Ciriani, A. Bernasconi, R. Drechsler
Efficient minimization of fully testable 2-SPP networks
2006 A. Bernasconi, V. Ciriani, R. Drechsler, T. Villa
DRedSOP: synthesis of a new class of regular functions
2006 A. Bernasconi, V. Ciriani
Testability of SPP three-level logic networks in static fault models
2006 V. Ciriani, A. Bernasconi, R. Drechsler
EXOR projected sum of products
2006 A. Bernasconi, V. Ciriani, R. Cordone
Exploiting regularities for boolean function synthesis
2006 A. Bernasconi, V. Ciriani, F. Luccio, L. Pagli
An approximation algorithm for fully testable kEP-SOP networks
2007 A. Bernasconi, V. Ciriani, R. Cordone
k-anonymity
2007 V. Ciriani, S. DE CAPITANI DI VIMERCATI, S. Foresti, P. Samarati
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