This paper presents an approach for simulation of mixed-signal circuits, analyzing possible sources of disturbances in analog-digital integrated systems, such as current pulses drawn from voltage supplies. A closed-form expression of voltage and current in the pull-up and the pull-down of a CMOS logic gate can be derived. A computer program demonstrates the feasibility of the proposed approach. Simulation results of a non-overlapped two-phase clock generator are presented.
Simulation of mixed-signal circuits for crosstalk evaluation / G. Trucco, G. Boselli, V. Liberali - In: Proceedings of the 46. IEEE international midwest symposium on circuits & systems : Cairo, Egypt, december 27-30, 2003. 1. / [a cura di] [s.n.]. - Piscataway : Institute of electrical and electronics engineers, 2003. - ISBN 0780382943. - pp. 261-264 (( Intervento presentato al 46. convegno IEEE International Midwest Symposium on Circuits and Systems tenutosi a Cairo nel 2003 [10.1109/MWSCAS.2003.1562268].
Simulation of mixed-signal circuits for crosstalk evaluation
G. TruccoPrimo
;G. BoselliSecondo
;V. LiberaliUltimo
2003
Abstract
This paper presents an approach for simulation of mixed-signal circuits, analyzing possible sources of disturbances in analog-digital integrated systems, such as current pulses drawn from voltage supplies. A closed-form expression of voltage and current in the pull-up and the pull-down of a CMOS logic gate can be derived. A computer program demonstrates the feasibility of the proposed approach. Simulation results of a non-overlapped two-phase clock generator are presented.
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