A track reconstruction system for the trigger of the ATLAS detector at the Large Hadron Collider is described. The Fast Tracker is a highly parallel hardware system designed to operate at the Level-1 trigger output rate. It will provide high-quality tracks reconstructed over the entire inner detector by the start of processing in the Level-2 trigger. The system is based on associative memories for pattern recognition and fast FPGA's for track reconstruction. Its design and expected performance under instantaneous luminosities up to 3 x 10^34 / cm^2 / s are discussed.
ATLAS FTK : Fast Track Trigger / S. Amerio, A. Andreani, A. Andreazza, A. Annovi, M. Beretta, V. Bevacqua, G. Blazey, M. Bogdan, E. Bossini, A. Boveia, V. Cavaliere, F. Canelli, F. Cervigni, Y. Cheng, M. Citterio, F. Crescioli, M. Dell'Orso, G. Drake, M. Dunford, P. Giannetti, F. Giorgi, J. Hoff, A. Kapliy, M. Kasten, Y.K. Kim, N. Kimura, A. Lanza, V. Liberali, T. Liu, D. Magalotti, A. Mccarn, C. Melachrinos, C. Meroni, A. Negri, M. Neubauer, B. Penning, M. Piendibene, J. Proudfoot, M. Riva, C. Roda, F. Sabatini, I. Sacco, M. Shochet, A. Stabile, F. Tang, J. Tang, R. Tripiccione, J. Tuggle, V. Vercesi, M. Verzocchi, M. Villa, R.A. Vitillo, G. Volpi, J. Webster, J. Wu, K. Yorita, J. Zhang. - In: POS PROCEEDINGS OF SCIENCE. - ISSN 1824-8039. - 137(2011 Jun), pp. 040.1-040.10. ((Intervento presentato al 20. convegno Anniversary International Workshop on Vertex Detectors tenutosi a Rust, Lake Neusiedl, Österreich nel 2011.
ATLAS FTK : Fast Track Trigger
A. AndreaniSecondo
;A. Andreazza;V. Liberali;C. Meroni;M. Riva;A. Stabile;
2011
Abstract
A track reconstruction system for the trigger of the ATLAS detector at the Large Hadron Collider is described. The Fast Tracker is a highly parallel hardware system designed to operate at the Level-1 trigger output rate. It will provide high-quality tracks reconstructed over the entire inner detector by the start of processing in the Level-2 trigger. The system is based on associative memories for pattern recognition and fast FPGA's for track reconstruction. Its design and expected performance under instantaneous luminosities up to 3 x 10^34 / cm^2 / s are discussed.File | Dimensione | Formato | |
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