Analysis and measurement of crosstalk effects on mixed-signal CMOS ICs with different mounting technologies

This paper presents an approach for the analysis and the experimental evaluation of crosstalk effects due to the current pulses drawn from voltage supplies in mixed analog–digital CMOS ICs. To this end, two test chips were designed in 0.18-μm CMOS technology. The two test chips were integrated and then mounted on a board with and without package to compare measurements on chips mounted in package and mounted on board. To ensure that the differences between measurements are only due to the assembling technique, the same printed circuit boards were used for both chip-in-package and chip-on-board. Moreover, the experimental setup was carefully arranged so as not to introduce further disturbances due to external connections or noise sources. Both ICs were extensively simulated by using a realistic model of on-chip and off-chip parasitics to study what happens in the analog section when digital switching noise is injected. Simulations results, confirmed by test chip measurements, demonstrate that disturbances due to switching currents in digital blocks propagate through substrate, package, and interconnection parasitics and affect analog voltages, thus degrading the circuit performance. Therefore, reduction of parasitics is essential in mixed-signal high-frequency circuits, such as radio-frequency front-ends.